yangxu0209 |
2008-06-29 09:56 |
在機(jī)械設(shè)計(jì)時(shí)應(yīng)注意的縮寫
Abbreviations and their explanations 縮寫與其解釋 ^fiJxU A<h^.{ Engineering 工程 / Process 工序 (制程) 18^#:=Z 4M&1E Man, Machine, Method, Material, Environment 人,機(jī)器,方法,物料,環(huán)境- 可能導(dǎo)致或造成問(wèn)題的根本原因 oACbZ#/@n AI Automatic Insertion 自動(dòng)插機(jī) r` B(ucE ASSY Assembly 制品裝配 2jf73$F ATE Automatic Test Equipment 自動(dòng)測(cè)試設(shè)備 gmUXh;aHc BL Baseline 參照點(diǎn) W
[*Go BM Benchmark 參照點(diǎn) sYEh>%mo^C BOM Bill of Material 生產(chǎn)產(chǎn)品所用的物料清單 HVJqDF C&ED/CAED Cause and Effect Diagram 原因和效果圖 6i+<0b}!/ CA Corrective Action 解決問(wèn)題所采取的措施 zRU9Q2Y CAD Computer-aided Design 電腦輔助設(shè)計(jì).用于制圖和設(shè)計(jì)3維物體的軟件 vp32}zeD CCB Change Control Board 對(duì)文件的要求進(jìn)行評(píng)審,批準(zhǔn),和更改的小組 '[Sm w'n6- CI Continuous Improvement 依照短期和長(zhǎng)期改善的重要性來(lái)做持續(xù)改善 $u~*V COB Chip on Board 邦定-線焊芯片到PCB板的裝配方法. v9\U2j CT Cycle Time 完成任務(wù)所須的時(shí)間 ^B_SAZ&%% DFM Design for Manufacturability 產(chǎn)品的設(shè)計(jì)對(duì)裝配的適合性 H#S`m DFMEA Design Failure Mode and Effect Analysis 設(shè)計(jì)失效模式與后果分析--在設(shè)計(jì)階段預(yù)測(cè)問(wèn)題的發(fā)生的可能性并且對(duì)之采取措施 $:?Dyu(Il DFSS Design for Six Sigma 六西格瑪(6-Sigma)設(shè)計(jì) -- 設(shè)計(jì)階段預(yù)測(cè)問(wèn)題的發(fā)生的可能性并且對(duì)之采取措施并提高設(shè)計(jì)對(duì)裝配的適合性 nTtE+~u DFT Design for Test 產(chǎn)品的設(shè)計(jì)對(duì)測(cè)試的適合性 bm*.*A]
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